1. Field of the Invention
This invention relates to power buffer circuits for providing power gain to a signal while maintaining its voltage at unity gain and more particularly to such a circuit that combines the advantages of metal oxide semiconductor and bipolar power transistors without their separate drawbacks.
2. Description of the Prior Art
Power buffer circuits are intended to provide power gain to a signal while maintaining that signal at its initial voltage level. They find common application in voltage regulators to provide high current gain with a constant output voltage. Another application of such circuits is in audio amplifiers, where they maintain the voltage level of the input signal while amplifying the signal's power.
Two popular prior power buffer circuits are the bipolar transistor emitter follower and the metal oxide semiconductor field-effect transistor (MOSFET) source follower. The emitter follower provides an output voltage on the emitter that closely follows the input voltage, differing only by the voltage drop across a forward-biased base emitter junction. Power gain is provided by the collector current summing with the base or input current. The result is a power gain between the input (base) and output (emitter) signals with only a small difference in voltage levels between the two.
The emitter follower, however, has several major disadvantages. First, a bipolar transistor requires a relatively large device area to provide a significant current gain when approaching saturation. A number of smaller bipolar transistors can be cascaded together with a large power device such as in a Darlington pair to improve current gain, but such an arrangement demands even more area. A second disadvantage is the high collector-to-emitter saturation voltage or "head room" necessary to operate the transistor in its linear region. This voltage difference multiplied by the high current flow through the transistor causes the emitter follower to dissipate considerable power.
A power MOS device configured as a source follower, on the other hand does not have these drawbacks. It provides nearly infinite current gain. For the same device area, it responds much faster to changing current demands than the Darlington emitter follower. Moreover, its "head room" or voltage difference between drain and source can be made arbitrarily small, limited only by die area, because of its resistive saturation characteristics. But the source follower suffers from poor DC voltage gain. The output voltage at its source cannot accurately follow the input voltage at its gate at DC or low frequencies because of low transconductance in the ohmic saturation region. In such cases, a large voltage difference is required between the gate voltage and the source voltage to produce the desired current gain.
A common technique to compensate for the DC gain limitation of the source follower is to tie the input voltage to the output voltage through a global feedback loop. Because of variations in the characteristics of MOS devices and variations in the device's response to changing drain voltage, however, this technique is largely ineffective. Cumulative gain variation can easily exceed a factor of 10, making prediction of stability and bandwidth nearly impossible at the device's upper frequency limits. The guarantee of stability requires drastically reducing the power bandwidth to far below the device's capability.